Quick little video on what it means to map a 32kB RAM to the "top half" of the 16 bit address space, what simple address decode logic looks like, etc.
Quick little video on what it means to map a 32kB RAM to the "top half" of the 16 bit address space, what simple address decode logic looks like, etc.
As a guy who grew up with 6502s, I always through the Z80's extra IO memory space was a great idea. It makes addressing peripheral devices a little easier since there are fewer address lines to deal with.
It doesn't really make IO addressing any easier, if anything it adds extra needed logic if you want to make use of it as extra space. What it does do is make it really easy to create banked memory systems that have Megabytes of memory or have easy means to swap ROMs in and out although these methods don't simplify the SW.
This brings back memories. So if we put latches on the io bus we could have a small rom and kernel in the low memory and use the latched addressing to page in different 32k high ram areas and if the kernel was smart enough we could create both a paging and some sort of possibly interrupt driven multi programming environment. Everything would have to live in its own 32k space, or we could write a more complex kernel
Beautifully explained: always wondered about the IO memory on the Z80 and how that relates to the relevant opcodes
Very well explained. Exactly what I needed. Thanks!
Wonderful video. Well laid out and explained!
Started to hack my ZX-Spectrum in 1983 or so. It could give full control to the machine code and return to Basic. Very fast. The memory map you show is very familiar. I also remember the special IO.
A simple way of decoding that could be done with a single chip is to use a 75LS156 which is a 3 to 8 line decoder with open collector outputs. This would decode the upper 3 address bits to blocks of 8K and you wire OR the outputs to allow any map layout you like and the enable input connects to the memory select signal. Additionally IO space is actually 16-bit addressed, the upper 8 bits are the C register. I love the Z80 for both the hardware and the software design. If I were building a new one these days I would just use a MRAM device to play both as the RAM and the ROM.
I always had my eye on the HD64180 10MHz, but the Z8S180 I's up to 33MHz , shame the 8bit retro crowd are wary of anything other than the easy Z80.
74LS156
Use an MSP430 derivative that has MRAM built in!! all in a single chip with I/O 🙂
I'm in a minimalist computing group and have for sure seen a lot about that decoder, sounds really useful.
Apologies if you've already covered this in another video, I've only watched this video, but I thought you may be interested in this: There's an interesting feature of the IO commands on the Z80; For example, the command "OUT (C),A" outputs the value in register A to an IO address pointed to by the value held in register C. The command asserts the value in register C onto the address bus pins A0-A7, however the processor also asserts the value in register B onto address lines A8-A15. This actually allows an IO address space of 64KiB rather than the official value of 256bytes. I have check both the Zilog datasheets for the Z80 and Rodnay Zak's book "Programming the Z80" both document this "feature"
I haven't covered that yet! It's coming in one of the future videos, so you beat me to punch.
I read that too, but who needs more than 256 IO ports The only advantage I can see from using it would be to send 2 bytes at the same time
@@PetRatty It's used on the Sinclair ZX80, ZX81 and Spectrum computers (and clones) to scan the keyboard matrix. Effectively as a cost saving method. The Intel 8080 (and 8085) CPUs do use only the lower eight bits for IO addressing.
@@markevans2294 All the 128K ZX Spectrum models also use various 16-bit I/O addresses to control memory paging and the Sound chip, as well as the floppy disk controller in the +3, but i know that you already know that, being a veteran "spec-chum" - yeah i recognise your name, both from the Speccy forums, and from various magazines ;)
you beat me to it, i was gonna say you can have 65536 IO addresses, i have computers that use addresses above 32768 for their keyboard read port..yes i said 'port' , one, all IO even addresses count as the internal IO port, but upper address lines are fed to keyboard rows, to select them, so you can only use odd addresses for yourself, unless you use a bit of external circuit trickery
Hugely helpful and really clear, thank you so much!
Excellent explanation, thank you
Excellent explanation of the Z80 that this old 6502 boy can follow!
The comments astound me..A man puts together an informative video about a subject and appears to get attacked. "OK, you won"??? I don't think anyone was trying to win anything. How strange. Brilliant video, thank you.
"There's nothing stranger than folks!" Really needs to be said in a northern English accent but you get my drift. These people are quick to complain and find fault but rarely if ever put up a link to their superior video to show us how it should be done.
I think I did, learn something that is. I know a bit about the 6502. The Z80 has RAM at the top and ROM at the bottom, so flipped from the 6502, and presumably what it does when it gets a reset or IRQ is different correspondingly. The other difference is that while it's common on the 6502 to "waste" address space because it's not worth decoding the full address bus for 16 ports, let alone one, you get an 8 bit I/O port bus on the Z80 so there's a lot less to decode and … you kinda want to make it count. That more or less seems to sum it up from 30,000 ft. It seems the 6502 gets more done per clock, but you have that lack of registers and the weird zero page to deal with. I think I recall math on the Z80 is more obnoxious due to its heritage but I haven't dug into those details yet. Sort of curious about this stuff because it might be kind of cool at some point to look into MSX stuff.
Theres nothing stopping anybody from having a hardware implementation of a JP command plus two byte address to anywhere in memory, then RAM can be from 0004 upwards, ROM anywhere.
You would believe how many data sheets I've read that have address 0x0000 at the top and 0xFFFF at the bottom, bottom and top are so misleading in the reality that is CPU data book authors. I designed a 68000 system once that had execution from 0x0000 after reset and we had ROM at zero until it had read the vector then it would switch RAM into that location and the ROM was located into somewhere else. This was needed for OS9-68k. Three are as many ways to do it as you think of doing.
At least one computer I know of (a kit, which I built) uses a setup which disables all memory on a hard reset which forces the Z80 to run NOP instructions (a zero byte) using pull-down resistors until it reaches the first ROM address, at which time the circuit automatically re-enables memory accesses and then goes into standby until the next hard reset.
I’ve built a handful of Z80, 6502, 65C02, 65C816, 8008, 68000 among others, homebrew computers over the years, I’m thinking about building a i4004 computer with the 4004’s I purchased around 20 years ago back before they got expensive, so far I’ve only built a test circuit for them, they tested good as they were new old stock parts when I acquired them & that was before the relabeled chip plague became a problem about a dozen or so years ago.
Nice, thank you. Does CP/M support memory paging? I mean you definitely should write the way it is swapped somewhere in bios, but does it support it on sw level?
CP/M 3.x supports memory banks/pages.
You won a new subscriber!!
would it be possible to elaborate more on the io register and how they should be used (eg:for uart, or 8 bit bus for leds) ?
I/O in the Z80 isn't a register, although it does use a register (generally the accumulator or A register). It's done nearly the same way as accessing memory, and in fact you could add up to another 256 bytes of memory and access it using I/O instructions. You would not be able to use it to run programs from, but you could use it for data storage. In fact, due to the (undocumented) way a particular instruction accesses I/O addresses, in theory it's possible to have up to another 64KB of memory for data storage by using I/O addresses. The IN A, (C) and OUT (C), A (indirect input and output) commands both actually do IN A, (BC) and OUT (BC), A which would in theory allow you to use 16 bit addresses for I/O. I say "in theory" because few if any programmers and no hardware (that I know of) have ever attempted to take advantage of this undocumented behaviour, and the hardware required for 16-bit I/O would interfere with the "immediate" mode IN A, (#nn) and OUT (#nn), A instructions, making them unreliable in practice. Anyone programming for a system which was designed to use the full 16 bits for input and output would need to be aware of this and avoid ever using the immediate mode IN and OUT instructions. But to address (hah!) your question directly, it's just a matter of decoding the 8-bit (generally) address and the control signals. Instead of using MEMREQ-BAR to initiate the transfer, the CPU uses the IOREQ-BAR line to tell the hardware that this is an IO request instead of a memory request. (-BAR just means that the signal is active when low instead of active when high) (Heck! I really wrote a lot, didn't I? I hope I didn't overload you with useless information.) 😅
Wow! So amazed by your channel, I've been interested in Z80 stuff, but never built a thing (yet). I've been long wandted to make a Z80 computer with switches and LEDs as an interface, but felt like a Z80 is a bit too good for that, so I'm still planning. Do you have some good advice for a beginner like me?
Start building stuff.
If you want to do it on the cheap, search for rc2014 on the easyeda site and get your boards made by jlcpcb
@@KennethFinnegan Will eventually get to there, but only when I'll have time :)
Hello I'm in the process of building a simple z80 computer. I have one question about z80 addresses. It is about connecting the eeprom km28c17 or km28c64a systems with 12 addresses and 8-bit data bus to the address line. Everything was going well until the 11 address line eproma was connected to the 16 address line z80 what about the other addresses or the rest, i.e. A12, A13, A14, A15 will be unused? Give 10 k to the rest of the mass From A12 to A15?
A12-15 conditional logic to provide a /CS for the ROM so it doesnt mirror throughout the address space and over the RAM.
As for CP/M BIOS being the only part concerned with the I/O address space is false. Applications often directly access the I/O address space with using the BIOS present.
so from the video it sounds like only A0-A7 are valid on /IORQ going low. That said I am looking at the manual for th Z80 (IXYS UM009011-0816) on page 11. From the timing diagram I read it as A0-A15 are valid. I could be reading this wrong or the data book I downloaded is bad.
If you're using the immediate mode IN or OUT instructions, the documentation says that the address is duplicated on both the upper and lower halves of the address bus. I've heard though that this might not always be so and sometimes either the refresh (R) register or the flags register is put onto the high 8 bits during an immediate mode IN or OUT instruction. I've heard tell though that the indirect mode instructions IN A, (C) and OUT (C), A actually use (BC) rather than (C) which means that the I/O address is the full 16 bits. I've never heard of anyone attempting to take advantage of this, which is understandable since the hardware for implementing the full 16 bits would likely cause unreliable operation of the immediate mode versions.
An additional unusual thing about the Z80 is the M1 line. Which means that it's, sort of, possible to have both "code" and "data" memory.
That's a really interesting idea...
Kenneth a decode logic to avoid the first 8K between 0000-4000 to map 16K or 32K SRAM
I/O space of z80 is 16bit boundary not 8bits !!!
I mean, the io instructions take an 8 bit address, so it's 8 bits. You can use the top half by loading addresses in registers and using the right io instructions.
Officially it is 8 bits - according to the datasheet which states 256 possible IO addresses. But since the Z80 can present the contents of a couple of different registers on the top half of the address depending on which IO instruction you use, then you can use various techniques to obtain a bigger address space if you wanted. Or you can use the contents of those other registers to read/write sequential addresses of a peripheral device e.g. using B as a counter. Or maybe use them to assert certain control signals of the device you are interacting with. There are potentially a couple of different things you can do utilising the top half of the address bus, so simply stating that the address space is 16 bit is wrong IMO.
Ok, fine , but instruction out (C),r put contents of r register on bus and C register at address A0..A7 and B register on A8..A15 this not means 16bit I/O? Out (N),A put A on bus and N at A0..A7 and repeat A at A8..A15 in that case 8 bits I/O ,Z180 inclusive have a instruction Out0 (N),A to write at page zero A on bus and N at A0..A7 and zero at A8..A15 to warrant to acess only page 0 "First 256 bytes " , system like MSX inclusive use 16 bit I/O in bios to access devices in I/O space and recomend to use this type of instruction!!! What you think about!!!!
I think your argument is with the designers of the Z80 who pretty clearly said that the IO address space is 8 bits.
@@KennethFinneganOk, you won, but during my life I have designed only 60 projects using Z80, 1 using the Z280 (which is no longer manufactured), 14 projects using the Z180, 1 one using the 32-bit Z380 (which is also not manufactured) With the exception of 4 projects with Z80 the rest I used out (C), r instead of Out (N), R. But that's ok, it accepts both 8Bits and 16Bits I / O, depending on how the I / O bus will be used. O. In CP / M it actually uses out (N) due to the 8080 inheritance that only had out N, A. Use 8 bits with some systems and other systems like MSX uses out (C), r which is 16 bits. and designed by Microsoft. The Z80 Hardware allows and works in practice to use 8-bit I / O and 16-bit I / O will depend on the Hardware designed, but of course the bus continues with 8 bits. regarding I / O addressing, which can be either 8 bits or 16 bits, ie use A0..A7 or use A0..A15
easy peasy.. I don't mean any disrespect but how long you have been cooking with a Z80 and how long did it take you to put together that board? There are a lot of things you didn't cover and there are things that really didn't need to be covered in this introduction. For one I never saw a memory map. What exact sequence of events take place upon reset? I'm guessing you have reset tied to a capacitor and a resistor so that the CPU is automatically hard reset when it's powered up. Where are the interrupt vector tables in memory? I'm sure you know the CPU expects an address to jump to when it reads the memory address thats mapped to the various interrupts. ( normally anyway ) . Typically I would have grouped the signals as Address bus, Data bus and Control bus I/O and power of course. I think you'd find a 74ls38 to decode memory would make life easier, depending on your specific choice of components. Back to the memory map. What exactly does the CPU expect to see and at what address space. Writing code to start at any address without regard to what the CPU expects isn't the best of ideas. That computer shouldn't take more than 72 hours to complete and with lots party time thrown in. I would recommend using a 6 or 5 inch needle driver to interconnect the wires. You'll find it a superior tool to any pliers. For I/O an 8255 might work best for you. Tri-state control would be worthy of consideration as well as a dedicated cpu oscillator and a 555 to drive the clock signal for single stepping the cpu. Forget cpm. Use assembly language. I really dont understand the current interest people have in these old CPU's. They were great in the 80, but we didn't have much to work with then. I think you'd find the MC68000 a lot less restrictive when it comes to CPU horsepower and building applications. The Z80 was great for control applications, but there are so many better things to use now. If you like old stuff, add an AY-3-8210 to your project. I think theres a modern version of the chip too with same pinouts. Anyway...have fun
When someone starts a comment with "I don't mean any disrespect but" the rest of the comment is always a consistent brand.
@@KennethFinnegan I don't mean any disrespect but your voice is clear and pleasant to listen to.
*Shakes fist at the exception to the rule*
@@KennethFinnegan I don't mean any disrespect but this helped me to understand custom computer circuitry
Excellent explanation. Thankyou.